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chengfa
- 可编程器件已有很久的发展历史了，其功能之卓越和成熟已经令当今的电子工程师们赞叹不已，除了它体积小、容量大、I/O口丰富、易编程和加密等优点外，更突出的特点是其芯片的在系统可编程技术。四位乘法器程序,VHDL语言,仿真图形 开发-four process
ebiu_ctl
- VHDL语言编写的外总线控制器，带有aes加密模块-VHDL language external bus controller, with aes encryption module
fsd
- 关于设计加密U盘的VHDL语言的程序及讲解说明，基本很非常有用-U disk encryption on the design process and explain the VHDL descr iption language, the basic is very very useful
caijing
- 这个是加密U盘的VHDL的源程序兼教学辅导，很具有实用性-U disk that is encrypted VHDL source program and coaching, it is practical
mini_aes_latest.tar
- mini_aes加密算法的vhdl实现,带有简易PDF介绍-mini_aes encryption algorithm vhdl implementation, introduced with a simple PDF
RBBaasicRSAS
- RSA加密算法的VHDL实实现，通过实际FPGA验证。 -The VHDL implementation of the RSA encryption algorithm to achieve, to verify the actual FPGA.
DES
- 一种基于VHDL的DES加密实现方法，经过实际验证可以运行-A VHDL-based DES encryption method, you can run after the actual verification
AESbyHGY_128
- VHDL描述AES加密系统。加密十次。与完成并可以成功仿真。-VHDL descr iption AES encryption systems. Encryption ten times. And complete and can be successfully simulated.
aes_pipe
- 流水线AES加密VHDL代码，代码规范，值得参考- The VHDL code of Pipelined AES encryption
sm4
- VHDL实现国家SM4加密算法（ECB）模式-VHDL to achieve national SM4 encryption algorithm (ECB) mode
4_coded_lock
- 本代码实现电子密码锁功能，用的是VHDL语言。可以方便和 可靠实现加密解密的过程。-The code to achieve the electronic password lock function, using the VHDL language. The process can be convenient and reliable implementation of encryption and decryption.
AES-FPGA
- 本文介绍了AES加密算法通过不同的功能结构的FPGA实现，语言背景为VHDL-This paper details Implementation of the Encryption algorithm AES under VHDL language In FPGA by using different architecture of mixcolumn. We then review this research investigates the AES algorithm in FPGA
DES-S
- des加密算法在MATLAB中，通过VHDL语言的实现-des encryption algorithm in MATLAB, through the realization of VHDL language
rsa_512_latest.tar
- 利用VHDL实现的RSA512位加密算法，-Use VHDL to achieve RSA512 bit encryption algorithm
EasyFPGA060_Routine_AESEncrypt
- VHDL easyfpga060开发板 加密实验(Encryption experimental)
tb_des_loop
- des——top加密vhdl模块，顶层设计接口用于docsis3.0加密(Des - Top encryption VHDL module, top-level design interface for docsis3.0 encryption)